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Intel fortifies Foundry with an actual customer: Fortinet

The Hot Take: The more the merrier and helps Intel get back to track making and developing x86 CPUs. Hopefully GPUs too.

Fortinet on Tuesday revealed it will use Intel Foundry to fab its sixth-gen Security Processor (SP6), a nice win for Chipzilla's sputtering chipmaking biz. The chips feature dedicated accelerators designed specifically for the security and cryptographic operations required by modern hardware firewalls. The custom chips are one of Fortinet's defining features. Many cybersecurity hardware players build appliances around commodity hardware like x86 and Arm CPUs, but Fortinet prefers custom application-specific integrated circuits (ASICs). The two…

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Intel Nova Lake leak points to Core Ultra Series 400 branding, staggered release next year — hotly anticipated flagship 52-core desktop CPU might not arrive until late 2027

The Hot Take: Long wait for the next build I guess.... LOVIN' the Antec Flux Nocua edition until then I guess.

Intel was expected to unveil its next-generation desktop processors later this year. The upcoming Nova Lake lineup has been making the rounds online, and a new report from VideoCardz suggests that Intel could introduce it under the Core Ultra Series 400 branding. For context, the current Arrow Lake and Arrow Lake Refresh desktop CPUs follow the Core Ultra Series 200 naming scheme, while Intel's latest Panther Lake mobile processors carry the Core Ultra Series 300 branding.Go deeper with TH Premium: CPU(Image credit: Tom's Hardware)CPU scaling…

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Intel becomes the first company to ship high-volume logic chips made with ASML's High NA EUV — select Panther Lake layers on 18A are now dual-qualified for 0.55 NA scanners

The Hot Take: ASML's monopoly needs get challenged, but not sure if Quantum will just make them invalid. We'll have to wait and see I guess.

Intel has entered high-volume manufacturing using ASML's High NA extreme ultraviolet (EUV) lithography technology for a subset of its Intel Core Ultra Series 3 "Panther Lake" processors, becoming the first company to ship high-volume logic products manufactured with the technology. ASML announced the milestone in an official press release on Wednesday, July 15, confirming that Intel Foundry is running the qualified High NA layers on its Intel 18A process node in Oregon.Go deeper with TH Premium: Chipmaking(Image credit: tsmc)A deeper look at…

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Apple Reportedly Agreed to Intel Chips To Avoid White House Tariffs

The Hot Take: Makes sense, especially if China takes Taiwan....

According to the Wall Street Journal (paywalled), Apple agreed to use Intel's U.S. chipmaking plants after White House officials pressured Tim Cook during tariff-relief talks last summer. MacRumors reports: In August 2025, Apple CEO Tim Cook was in Washington to lobby the Trump administration to drop its proposed 100 percent tariff on semiconductor imports -- a levy that would have raised costs across Apple's product line. Apple reportedly secured an exemption after pledging to invest hundreds of billions of dollars in the U.S., although many…

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Intel Nova Lake CPUs To Bring Back AVX-512 Support Six Years After The Chipmaker Abandoned It On Client Platforms

The Hot Take: Was almost like they were purposefully crippling their processors under past management.

Intel Nova Lake CPUs will mark the return of AVX-512, a feature that has long been abandoned by the company for its client CPUs. AVX-512 Is Coming Back To Intel's Consumer CPUs, Starting With Nova Lake Intel has had a love-hate relationship with AVX-512 on its consumer CPUs. The AVX-512 instruction set was last seen on Intel's Tiger Lake (11th Gen) family, and since then, the company has offered no support for it on its modern-day chips. Meanwhile, AMD has been offering AVX-512 support on its Zen 4 and Zen 5 chips, both client and server…

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Intel’s XBM Memory Takes Aim At HBM4, Promising 32 GT/s Speeds And Lower Costs Through UCIe Links

The Hot Take: Competition is GOOD.

Intel has published a new patent on its XBM memory, which is proposed as a replacement for HBM4, offering much higher bandwidth capabilities. XBM vs HBM: Intel's New Proposed DRAM Solution Extends To 32 GT/s Speeds, While Reducing Costs Through UCIe Links HBM continues to be the standard for AI accelerators, but more recently, we have seen LPDDR memory being used to overcome shortages, prices, and power associated with the standard. Intel's past attempts at DRAM, such as HMC (Hybrid Memory Cube) and MCDRAM, faced various issues and never came…

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Intel Posts Initial GCC Compiler Patches For AI Compute Extensions "ACE"

The Hot Take: I really wonder if this will deflate the Ai bubble even a little bit.

The x86 Ecosystem Advisory Group led by Intel and AMD recently firmed up the AI Compute Extensions (ACE) specification for optimizing x86 for AI computation tasks around matrix multiplication and the like for machine learning workloads. The cross-vendor ACE extension is ultimately a successor to Intel's Advanced Matrix Extensions (AMX). Posted to the GCC mailing list today by Intel engineers are the initial patches in preparing the compiler support for ACE...

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Intel expands production of photomasks in California: EUV and High-NA EUV in the focal point

The Hot Take: Intel Ramping things up to play catch up and win volume from TSMC.

Intel this week initiated expansion of its Bowers Campus in Santa Clara, California, in a bid to produce more photomasks (reticles) in the U.S. The company intends to build a new manufacturing facility and a new utility building at the site, which will reinforce the site's position as a key producer of photomasks for Intel.Go deeper with TH Premium: Chipmaking(Image credit: tsmc)A deeper look at the chipmaking supply chainTSMC's $165 billion U.S. investments examinedChina reportedly reverse-engineers EUV toolChina bets on DUV, as EUV blockade…

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AMD Zen 6 Takes A Page From Intel With New Low-Power Cores

The Hot Take: Oh so the Ultra series aren't just crap then? /smh

It's curious to call this one a leak, exactly, since the original source is direct from AMD and live on the web, but here we go: AMD's Vishal Badole submitted a patch for the Linux Kernel that he describes as adding support for "a Low Power core type, in addition to the existing Performance and Efficiency types." That's pretty clear-cut. Now,

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