← All Posts

Claude hitches ride on SpaceX's datacenter capacity

The Hot Take: Ai usage growing pretty steady and fast it would appear.

Anthropic is partnering with SpaceX to ease capacity constraints that have stranded Claude customers, a gesture that may soothe developer discontent about service availability and cost. Ami Vora, chief product officer at Anthropic, announced the expanded rate limits during Code for Claude, a developer event livestreamed from San Francisco. "As of today, we are increasing rate limits for developers on Claude Code and the Claude Platform," said Vora. "More specifically, we are doubling Claude Code's five-hour rate limits for Pro, Max, Team, and seat-based enterprise plans. And we're raising our API limits considerably for Claude Opus." Anthropic is also ending its peak hours limit reduction on Claude Code for Pro and Max accounts. The AI biz is able to do this, she explained, thanks to a partnership with SpaceX that expands available inference capacity. Anthropic has struck a deal to use "all the capacity of [SpaceX’s] Colossus 1 data center." According to SpaceX, "Colossus 1 features over 220,000 Nvidia GPUs, including dense deployments of H100, H200, and next-generation GB200 accelerators." The deal adds more than 300 megawatts of new capacity within the month and follows similar compute arrangements with Amazon and Google/Broadcom. The company's insatiable hunger for processing power may even take it into space. Anthropic says that it "expressed interest in partnering with SpaceX to develop multiple gigawatts of orbital AI compute capacity." In recent months, Anthropic has struggled to meet unexpected demand for Claude services – its models became sufficiently capable to win over skeptical developers and usage patterns shifted as a result of the popularity of OpenClaw's long-running agents. "Year over year, API volume is up nearly 17x on the cloud platform," said Vora. "And on Claude Code, the average developer is now spending 20 hours per week running Claude." Amid this growing popularity, Anthropic has also wrestled with bugs that affected model performance. During her presentation, Vora tempered expectations by noting that no new model would be announced. Instead, she presided over a review of new and recent Claude features in an effort to frame model improvements as exponential. The salient exponent here would be two – the doubling of Claude's five-hour rate limits. Model performance, as measured by benchmarks, has been incremental. Opus 4.7 is a few percentage points better than Opus 4.6 in various measurements, not twice as capable or more. That didn't stop Vora from claiming, "even though model capabilities are improving on an exponential, most organizations are still adopting AI on a linear path." Vora's use of "exponential" may be more of a thematic framing device than a literal assertion of progress, a device to draw a contrast between Claude's capabilities and a more cautious pace of corporate AI adoption. She cast the upcoming feature review as an opportunity for customers to see where Claude development is headed, "So you can plan for it and ride the exponential with us." The remainder of the presentation consisted of a summary of recent Claude feature improvements. These include: multi-agent orchestration, outcomes, and dreaming – a capability that showed up in the recent Claude Code source leak. "With Dreaming," explained Angela Jiang, head of product for the Claude platform, "Claude is actually able to self-learn. It's able to actually inspect over its previous sessions, figure out skills that it missed, lessons it should have learned, and actually apply those directly to memory on its own." Boris Cherny, head of Claude Code, took a turn on stage to remind everyone about Routines, a way to trigger and run Claude jobs locally or on cloud servers. "Routines can be run on a schedule, they can be kicked off by webhooks, or they can even be kicked off by arbitrary API calls, you can run them locally on your machine or on remote cloud compute," he said. Cherny said, "for me personally, a lot of my code nowadays is written by routines. I'm not the one doing the prompting. I'm the one creating a routine that does the prompting." Who wouldn't want to "ride the exponential" when one's company is paying the API bill? ®

Read the full article

Rambus Bets on Time Division Multiplexing to Fix PCIe 7.0 for AI Workloads, As GPUs Starve for Data

The Hot Take: Ai & GPUs need that bandwidth.

Rambus wants to address ongoing AI bandwidth problems with its new PCIe 7.0 Switch IP that features Time Division Multiplexing. Rambus Introduces PCIe 7.0 Switch IP with Time Division Multiplexing for Scalable AI and Data Center Infrastructure Press Release: Rambus, a premier chip and silicon IP provider making data faster and safer, today announced the Rambus PCIe 7.0 Switch IP with Time Division Multiplexing (TDM), a new addition to its advanced interconnect IP portfolio designed to address the rapidly escalating bandwidth, latency, and scalability requirements of AI, cloud, and high-performance computing (HPC) systems. As AI infrastructure grows in scale and architectural complexity, […]Read full article at https://wccftech.com/rambus-bets-on-time-division-multiplexing-to-fix-pcie-7-0-for-ai-workloads/

Read the full article

Arm and AMD eye agentic AI CPU feast

The Hot Take: So was ARM not breaking into the WinTel market so they shifted to Ai market or are they just chasing the highest dollars?

Investment bank UBS reckons agentic AI will send CPU demand soaring, with Arm and AMD best placed to grab the spoils. UBS analysts believe the growth of agentic AI software will drive strong demand for CPUs in the AI era. The bank said agentic AI increases processor workloads and favours chips with higher core counts and better power efficiency. That view gives Arm the biggest potential upside, followed by AMD. Intel could benefit too, since a growing total addressable market tends to lift more than one silicon boat. In fresh coverage of British chip design house Arm, UBS said CPU demand is surging. The bank said agentic AI computing will favour chips with higher core counts and a bias towards power efficiency. UBS reckons the total server market could grow five times by calendar year 2030. It put the figure at $170bn, up from $30bn in calendar year 2025. Within that market, UBS expects Arm to benefit the most. The bank said Arm could potentially grab as much as 40-45 per cent of the total share, which would make the x86 crowd choke on its roadmaps. The bank’s report cited expert comments behind three main themes explaining the surge in CPU demand. The first is that agentic AI workloads rely more heavily on CPU cores. That shift is expected to require a three- to fivefold increase in CPU core counts per user and per GPU. Servers with standalone CPUs will need more chips, which is the kind of problem chip sellers enjoy having. UBS said that demand for agentic AI will push some workloads to local PCs. It pointed to Anthropic’s Claude Code as an example. The need for higher core counts and power efficiency should tilt demand first towards Arm and then AMD. That sounds grim for anyone still selling yesterday’s watt-guzzling boxes as tomorrow’s AI answer. Chipzilla could still serve this market through its Coral Rapids platform, according to UBS. The catch is that benefiting from a bigger market and winning the best bits of it are not quite the same trick.  

Read the full article

Intel's ZAM Memory Threatens HBM's AI Throne With 2x The Bandwidth of HBM4, More Capacity & Low Thermal Constraints

The Hot Take: If this all is true they have a winner on their hands.

Intel's Z-Angle Memory (ZAM) is approaching completion as it races towards taking a bite at the AI boom while challenging HBM as a viable alternative. Intel's ZAM Challenges HBM As A Big Memory Innovation In the High-Bandwidth, High-Capacity Segment Offering 2x The Speed of HBM4 Z-Angle Memory or ZAM has been stirring up a lot of talk in the memory segment. The upcoming memory standard is being developed by Intel and SoftBank & aims to offer a low-power, high-density replacement to HBM. Now, new details have been shared that provide more insight into ZAM memory. For starters, the new memory […]Read full article at https://wccftech.com/intel-zam-memory-threatens-hbms-ai-throne-with-2x-the-bandwidth-of-hbm4/

Read the full article

Tenstorrent Vows to ‘Crush Everyone’ as Galaxy Blackhole Hits 350 Tokens/s on DeepSeek R1, Undercutting NVIDIA’s GB300 5x AI TCO

The Hot Take: RISC-V breaking the GPU strangle hold on GPU's? YES PLEASE.

Tenstorrent made a bold claim during their TT-Deploy livestream, saying they are going to crush everyone at everything, including AI, with their Galaxy servers. Tenstorrent Galaxy Supercluster Offers 10x Faster GenAI Video, And Destroys Current-Gen GPUs With "Blitz Mode", Offering 350+ Tokens/s In DeepSeek R1 Jim Keller and his Tenstorrent are on a mission to challenge the existing AI hierarchy with their RISC-V-powered platforms. As such, the company unveiled its latest Galaxy Blackhole servers for AI at scale. With Galaxy Blackhole, Tenstorrent offers a fully Networked and native AI solution that includes compute, memory, and networking, all unified into a […]Read full article at https://wccftech.com/tenstorrent-vows-to-crush-everyone-galaxy-blackhole-hits-350-tokens-on-deepseek-r1-undercut-nvidia-gb300-ai-tco/

Read the full article

Intel & AMD Work On APX, The Next Major Step In The Evolution of x86 Architectures, Adds More Performance Without Requiring More Die Area & Power

The Hot Take: Just what we need Ai specific instructions for them to gobble up all the CPU's now.

APX or Advanced Performance Extensions are the next evolution of x86 as Intel & AMD co-develop new standards for the architecture. APX Expands the x86 Instruction Set, Bringing Faster Performance & New Features That Will Benefit Both Intel and AMD's Next-Gen Chips Two days ago, we talked about ACE (AI Compute Extensions), which is a unified instruction set that aims to increase matrix-multiply performance for next-gen x86 chips. ACE is just one part of the grander scheme in which both Intel and AMD are working together to evolve the x86 architecture under a single unified framework through the recently established […]Read full article at https://wccftech.com/intel-amd-work-on-apx-the-next-major-step-in-the-evolution-of-x86-architectures/

Read the full article

SoftBank subsidiary working with Intel to develop radical new ZAM memory is now receiving Japanese gov't subsidies — new memory designed as a lower-power HBM for AI workloads

The Hot Take: HBM competitor would be good bringing Ai accelerator competition for RAM. Intel bringing it should help Intel to catch up in the Ai game for sure.

Japan’s SaiMemory, a SoftBank subsidiary collaborating with Intel, has secured NEDO funding to develop Z-Angle Memory (ZAM), a next-gen DRAM architecture addressing HBM limitations

Read the full article

Bolt Graphics Tapes Out Zeus GPU, Targets HPC with Bold RTX 5090 Claims

The Hot Take: We all desperately need this to not be vapor-ware!

A relatively unknown U. S. -based startup, Bolt Graphics, has announced that it has successfully taped out the first test chip of its Zeus GPU architecture. The company positions Zeus as a disruptive compute accelerator, previously claiming performance up to 150% higher than an NVIDIA GeForce RTX 5090 while consumi ...

Read the full article

Elon Musk says his TeraFab facilities will use Intel's 14A process technology to make AI chips — SpaceX will be responsible for high-volume chip manufacturing in likely Intel tech licensing deal

The Hot Take: Intel needs this licensing support as other law suits are back in court with patent trolls....

Elon Musk reveals details about TeraFab: Intel provides technology, Tesla builds pilot line, SpaceX constructs high-volume fab.

Read the full article

AMD Taps GlobalFoundries for MI500’s Co-Packaged Optics as the Silicon Photonics Race With NVIDIA Heats Up

The Hot Take: Getting cozier with your previous manufacturing division in a previous life.

AMD will be leveraging GlobalFoundries for the development of its MRM Co-packaged Optic solution for the next-gen Instinct MI500 AI accelerators. GlobalFoundries & AMD Working Together on Co-Packaged Optics Hardware For Instinct MI500 Accelerators CPO or Co-Packaged Optics (Silicon Photonics) is the next-generation solution that reduces reliance on copper and harnesses light to transfer signals. These CPOs are packaged alongside hardware accelerators such as GPUs and will be a key solution for next-gen AI factories, offering improved interconnect latency and creating high-bandwidth connections between CPU and GPU. Both AMD and NVIDIA will be leveraging these technologies for their next-gen AI […]Read full article at https://wccftech.com/amd-taps-globalfoundries-for-mi500-co-packaged-optics/

Read the full article