21 posts
The Hot Take: Oh so the Ultra series aren't just crap then? /smh
It's curious to call this one a leak, exactly, since the original source is direct from AMD and live on the web, but here we go: AMD's Vishal Badole submitted a patch for the Linux Kernel that he describes as adding support for "a Low Power core type, in addition to the existing Performance and Efficiency types." That's pretty clear-cut. Now,
Read the full articleThe Hot Take: We'll see how long before they go to Intel because TSMC is filled up in Arizona FABs.
Nvidia will stay TSMCâs biggest customer in 2027, but AMDâs EPYC Venice could pinch the CPU bragging rights. TSMC is seeing rising demand for 2.5D advanced packaging as CPUs become more important in the agentic AI bunfight. Apparently, GPUs alone are no longer enough to feed the machine. Morgan Stanley reckons Nvidia will remain TSMCâs largest CoWoS customer in 2027. TSMC is expected to reach wafer capacity of 200,000 wafers a month that year. Nvidia is using TSMCâs CoWoS packaging for two main product families. CoWoS-L is for AI GPUs such as Blackwell and Rubin, while CoWoS-R is for Vera CPUs. CoWoS-L capacity is expected to hit about 910,000 units, up 40 per cent year on year. Vera shipments are expected to double, which would help Nvidia lift data centre revenue by 52 per cent. Morgan Stanley said:âNvidia uses TSMCâs CoWoS-L as the single source for all its AI GPU products (e.g. Blackwell and Rubin). Its 2027 CoWoS-L consumption could reach ~910k, up ~40 per cent year on year. Strong CoWoS-R bookings by Nvidia suggest room for AI GPM products (such as doubling). Taken together, we estimate Nvidiaâs 2027 forecast for Nvidiaâs data centre revenue to rise 52 per cent year on year.â Nvidia has been pivoting harder into CPUs to claw back China revenue after GPU restrictions. Several customers have shown interest in Vera CPUs. The company has hand-delivered the first Vera CPUs to Anthropic, OpenAI, SpaceX and Oracle. Nothing says âagentic AI eraâ like an expensive chip being passed around the usual suspects. The problem for Nvidia is that AMD is not politely standing at the back. Its next-generation EPYC Venice platform is already in volume production at TSMC. Venice is based on AMDâs upcoming Zen 6 architecture and is expected to deliver better performance and efficiency. It targets both AI and HPC, while Vera is being pitched squarely at agentic AI. Morgan Stanley projects Nvidiaâs Vera CPUs could reach 5.75 million units by 2027. AMDâs EPYC Venice, though, could reach 6.75 million units in 2027. That is 17 per cent more than Vera and 5.4 times its expected 2026 volume. âBased on our CoWoS consumption forecasts, Nvidiaâs 5nm Vera CPU could grow to 5.75mn units in 2027, while AMDâs 2nm Venice CPU may reach 6.75mn units in 2027 vs. ~1.25mn in 2026,â the beancounters said. AMD has another advantage on paper, with Venice using TSMCâs advanced 2-nanometre process. Vera is based on a 3-nanometre process. The real headache for both companies may not be each other. It is custom silicon, where the cloud crowd is deciding that buying chips off the shelf is for the riffraff. OpenAI, Google, Amazon and others are either talking up custom chips or already building them. That turns the AI supply chain into a fight between outside suppliers and in-house silicon vanity projects.
Read the full articleThe Hot Take: Why did it disappear in the first place?
AMD has confirmed that it will restore Transparent Secure Memory Encryption (TSME) support on consumer Ryzen processors after previously removing the feature through AGESA firmware updates.
Read the full articleThe Hot Take: AMD getting ready for Intel refocus on HPDT?
With Threadripper, it has always been a bit like heavy-haul transport on the motorway: massively overdimensioned for normal users, but for certain workloads exactly the kind of tool where every additional lane matters. Now AMDâs next workstation generation has become tangible for the first time. An entry for âTR6 Mustang Peakâ has appeared in AMDâs [âŚ]
Read the full articleThe Hot Take: Making the CPU important again on the x86 platform.
ACE, the upcoming set of x86 Extensions defined by both AMD & Intel, has seen the latest spec release, focusing on AI acceleration. AMD & Intel Focus on AI Acceleration Through Next-Gen x86 Architectures That Are ACE Compliant Last year, Intel and AMD partnered to strengthen the x86 ecosystem through their "x86 Ecosystem Advisory Group" initiative. The plan was to offer a standardized set of features across architectures to make x86 accessible, scalable, and compatible with future requirements. Four key features were announced: FRED, AVX10, ChkTag, and ACE. Now, the latest ACE "AI Compute Extensions" specifications have been published by AMD [âŚ]Read full article at https://wccftech.com/amd-intel-arm-x86-with-ace-matrix-multiply-engines-low-precision-ai-formats-future-cpus/
Read the full articleThe Hot Take: Well now....
AMD appears to have yanked a memory encryption protection from consumer Ryzen chips, leaving users to play firmware detective. For those who came in late: a decade ago, AMD added Transparent Secure Memory Encryption (TSME) to higher-end CPUs to protect systems from cold-boot attacks and other physical exploits that can siphon data from memory. The feature encrypts everything stored in RAM, making stolen memory contents useless to attackers with physical access. Over time, TSME turned up on cheaper Ryzen consumer chips, and privacy-minded users reasonably started treating it as part of the package. Recently, without warning, that protection vanished from lower-end AMD chips in a way Windows users could not easily detect and Linux users could spot only with some technical faffing. According to Ars Technica AMD has not explained why TSME worked on these CPUs or fully confirmed the change, saying only that TSME âis a security feature only applied to PRO CPUs as part of AMD PRO Technologies.â In April, Linux hobbyist Ben Kilpatrick installed a new operating system on a Ryzen 7 9700X system and ran Host Security ID to check firmware and hardware protections. He found HSI reporting âencrypted RAM: not supportedâ, even though TSME had been enabled in BIOS and had previously shown as âencryptedâ. Kilpatrickâs digging led MSI engineers to test consumer Ryzen chips on MSI and Gigabyte boards, where older AGESA firmware enabled TSME but newer AGESA 1.2.7.0 showed it as unsupported. Pro Ryzen chips supported TSME across motherboard brands and firmware versions, which rather spoiled the idea that this was just a random board-level wobble. âThe big outstanding question is whether this is a deliberate policy decision by AMD to restrict TSME to PRO chips, or an unintentional regression that was introduced in AGESA 1.2.7.0,â Kilpatrick told Ars. After Kilpatrick filed a bug report on AMDâs public engineering GitHub, AMD fellow software engineer Tom Lendacky suggested toggling the BIOS option and then speaking to MSI if that failed. AMD senior principal software engineer Mario Limonciello gave similar advice, telling him: âIf it still doesnât work; then yes please report it to your board vendor to debug.â Kilpatrick later said MSI had been told by AMD that TSME was officially supported only on PRO processors, and tests showed TSME active on a Ryzen 9945 PRO but off on a consumer Ryzen 9800X3D. MSIâs ABL dump comparisons reportedly showed the internal AGESA flag DfIsTsmeEnabled returning FALSE for consumer chips, even when TSME was set to AUTO or ENABLED in BIOS. Kilpatrick pressed AMD on whether this was a silicon limitation or a firmware policy decision, because one is fixed and the other could be changed. Limonciello replied: âMy apologies, but I donât have any more information to share on this topic.â This is embarrassing as Lendacky said in 2020 that a consumer Ryzen 3700X âshould support TSMEâ, and in 2025 recommended using it if the BIOS exposed the option. Silicon-level security expert Joe Fitzgerald said: âBut I really feel like an explanation should be in order, even if it was âTSME was never supposed to be supported. We did ship some firmwares that erroneously enabled it, but you shouldnât use them since we canât guarantee itâll work properly.ââ Â
Read the full articleThe Hot Take: CISC muscle on display... When you don't care about how many watts your cpu consumes ARM/RISC will never touch the raw throughput of these chips.
AMD has shared the first official results for its 256-core EPYC Venice CPU, saying it beats Nvidia's Vera by 3.3x in a rack-level deployment.
Read the full articleThe Hot Take: Creeps back into the chips...
AMDâs Zen 5 looked efficient, but weak demand and a dodgy RDSEED bug have taken the shine off. For those with long memories, AMDâs Ryzen 9000 series arrived in 2024, promising strong efficiency and decent IPC gains. Months later, the launch looks messier. Sales were soft, prices fell quickly, and a documented random-number flaw has spooked some buyers. The line-up included the 16-core Ryzen 9 9950X, 12-core 9900X, eight-core 9700X and six-core 9600X. Early benchmarks were mixed. Gaming gains were often single-digit at higher resolutions, while productivity wins varied by workload. Reviewers liked the cooler running and lower power use, but Zen 4 owners saw little reason to upgrade. AMD leaned harder into X3D chips, where stacked cache delivered clearer frame-rate gains for gamers. According to Webpro News in late 2025, AMD detailed an RDSEED flaw affecting all Zen 5 processors. The bug, tracked as AMD-SB-7055 and CVE-2025-62626, hits the 16-bit and 32-bit versions of RDSEED. They can return zero far more often than proper randomness allows, while the carry flag still reports success. That means software trusting the hardware output can swallow predictable data, which is grim news for cryptography. Linux patches moved to disable the affected instruction or use other sources, but AMD has not issued a recall and points to microcode and software mitigations. By early 2026, AMD was preparing refreshed SKUs to counter Intelâs Arrow Lake updates. Leaks pointed to Ryzen 7 9750X and Ryzen 5 9650X models with higher TDPs, higher clocks and improved memory support in some setups. That looks like squeezing more speed from existing silicon. Power rises and Zen 5âs efficiency pitch gets thinner. Corporate buyers have reason to wait until mitigations are stable. Gamers are likely to favour X3D models, which offer clearer frame-rate gains and less early-launch baggage. Server and workstation buyers have more to worry about because secure boot, VPNs and database encryption depend on reliable entropy. Zen 5 still brought gains in branch prediction, cache design and TSMC N4P fabrication. The RDSEED bug does not erase that work, but it exposes an awkward validation gap. AMD keeps shipping Zen 5 parts, and AM5 support remains a useful strength. Still, modest adoption, a documented RNG flaw and fast refresh plans make Zen 5 look less tidy than AMD wanted. System builders running cryptographic workloads should avoid first-wave Zen 5 chips unless mitigations are tested. Everyone else should look harder at refreshed SKUs or X3D parts while AMD patches the trust problem. Â
Read the full articleThe Hot Take: Ai sucking everything up.
AMD's next-gen Radeon GPUs based on the RDNA 5 architecture are still far away from launch as memory shortages grip the PC segment. Memory Shortages & Rising Component Prices Are The Reason Behind AMD's Push Back on Radeon "RDNA 5" Gaming GPUs The Radeon RX 9000 GPUs based on the RDNA 4 graphics architecture launched last year. This year, AMD launched the Radeon RX 9070 GRE for gamers, still based on the RDNA 4 architecture. While the new card aims to provide gamers with a good 1440p solution, the majority of those who have been waiting for next-generation solutions from [âŚ]Read full article at https://wccftech.com/amds-radeon-rdna-5-gaming-gpus-slip-to-late-2027-or-early-2028/
Read the full articleThe Hot Take: Just WOW.
AMD has announced that its 6th Gen EPYC processor, codenamed Venice, has entered production ramp on TSMC's N2 process in Taiwan.
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