The Hot Take: New P-Cores and bus, sounds like Intel is trying to innovate again. Which is good for all of us, healthy competition will help bring/keep prices down for CPUs at least.
Intel has officially confirmed its next-gen Xeon 7 Diamond Rapids CPUs are coming in 2027, featuring 50% higher core counts and twice the memory bandwidth of Xeon 6 in a bid to compete against AMDâs upcoming EPYC Venice CPUs.
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The Hot Take: Well have to see if this claim holds up on launch.
Intel is putting its 18A node into the data center with new Xeon 6+ Clearwater Forest CPUs, which pack up to 288 E-cores for dense compute.
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The Hot Take: CISC monsters coming from owner of the x86 ISA.
COMPUTEX 2026 Intelâs upcoming Diamond Rapids Xeon will boost core counts to 192, a 50 percent increase over last generation, the x86 giant revealed at Computex in Taipei this week. But while core counts continue to rise, in doing so Intel has managed to cut thread counts by a quarter. Yep, Hyperthreading â Intel's marketing for simultaneous multithreading â is officially dead. Intel first added support for SMT all the way back in 2002. The technology boosted utilization by enabling two threads to harness idle execution units during a single cycle. While SMT doesnât double throughput, for certain applications it can deliver double-digit percentage gains. After slowly abandoning the tech across its consumer product lineup, Intel's Xeons are latest to get the cut. Except, wait! It seems Intel may have seen the error of its ways, and is already reversing course on the decision. Intelâs next next Xeon, codenamed Coral Rapids, will bring SMT back. The jump from 128 to 192 is a big jump for Intel, but still smaller than the AMD is making with its 256-core Venice Epycs. If that werenât enough, it looks like AMD could beat Intel to market by as much as a year. Diamond Rapids is now slated for release sometime in 2027. Echos of Epyc, notes of Monaka In addition to core count, we also got our first look at how Intel will stitch the chip together. It turns out AMD might have been onto something when it started gluing silicon together back in 2017, because Intelâs next round Xeons look more like an Epyc under the hood than ever. We know the chip will be fabbed using Intelâs 18A-P process tech, a refined version of its 2nm-class process tech. Beyond this details get a little fuzzy. From the renders shared in Intelâs press deck, we can see what appear to be two I/O dies serving four vertically stacked compute assemblies assembled using its Foveros packaging tech. This isnât the first time weâve seen something like this from Intel. Intelâs Clearwater Forest, which is finally launching after years of teasing, also used a similar arrangement, with four 24-core compute tiles sitting atop a base die containing the memory controller and L3 cache. Moving the L3 cache to the base die frees up a lot of die area on the compute chiplet. In this case, we're looking at four 48-core compute chiplets. In this respect, Diamond Rapids looks a lot like another CPU weâve looked at recently: Fujitsuâs Monaka. That chip uses an almost identical chip layout, albeit with one I/O die rather than two. While weâre fairly certain Diamond Rapidâs L3 cache will live on the base die, the memory controller could be housed on the four base dies or it could be on the I/O dies, similar to what AMD has done since Rome launched in 2019. If we had to guess, our bet would be on the I/O die, since it would reduce the number of NUMA nodes to one or two as opposed to four. Not a mainstream part Unlike Intelâs last P-core Xeon, codenamed Granite Rapids, donât expect to see Diamond Rapids deployed widely in enterprise virtualization or storage servers. According to Intel, Diamond Rapids is âoptimized for high-demand IaaS, high-perf/thread,â putting it in the same class as its high-performance-computing (HPC)-centric 6900P-series parts. The lack of SMT complicates hypervisor licensing models. Where you once got two threads for the price of one, Diamond Rapids customers will now be getting half as many for their dollar. There are of course ways of getting around this. Oracle rented out its Ampere-based instances, which also lack SMT, in core-pairs rather than on a core-per-core basis, but something like this would presumably require buy-in from the likes of VMware or RedHat. As with past HP- optimized processors, Diamond Rapids will be packing a much beefier memory bus than most folks are going to be looking for. HPC workloads like their memory bandwidth and the next-gen Xeon will have no shortage of it with 16-channels of DDR5. Intel hasnât disclosed what memory speeds the chip will support out of the box. With that said, Clearwater is already at 8000 MT/s on standard RDIMMS, and Granite could hit 8800 MT/s on MRDIMMS â in fact, 9600 MT/s DIMMS wouldnât be an unreasonable assumption. That works out to 1.2 TB/s of bandwidth per socket, which happens to be the same as Nvidiaâs LPDDR5X-packed Vera CPUs. Thatâs not the only thing we're still in the dark about. Power consumption and instruction per clock gains from the chipâs new architecture are details we expect Intel to trickle out. The good news: we wonât have to wait long for the next round of specifications, as Intel will be presenting on Diamond Rapids at Hot Chips in August.
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The Hot Take: Lets see if they are able to catch up GPU wise. I hope they aren't dropping Discrete GPUs like I've been hearing.
Intel is reportedly preparing a specialized Nova Lake processor aimed at edge AI and local inference workloads, according to information shared by leaker @GoldenPigUpgradePack.
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The Hot Take: Only time will tell on this one. I don't think so but we'll see here soon enough.
A new report from GF Securities (via SeekingAlpha) claims NVIDIA is gearing up to use its June 1st Computex keynote to pitch its upcoming Arm-based Vera CPU as an x86 killer. The financial analysts claim NVIDIA will boast that Vera delivers up to "1.5x faster speeds, 2x the performance, and 4x the density per rack," as compared to traditional
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The Hot Take: Performance and less hybrid coming back to x86.
Intel's next-generation desktop platform is apparently going to persist for approximately three and a half full CPU generations if you include the mobile-only Titan Lake. That's just one of the major details released by serial leaker Moore's Law is Dead in a new video that also includes the claims that upcoming Intel CPUs will not only skip
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The Hot Take: Just WOW.
AMD has announced that its 6th Gen EPYC processor, codenamed Venice, has entered production ramp on TSMC's N2 process in Taiwan.
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The Hot Take: Licensee's mad? I think so.
Arm was notified by the US Federal Trade Commission in early 2026 that it was the subject of an antitrust investigation after the chip designer said it would begin engineering its own processors, according to Bloomberg. The FTC is examining whether Arm used its dominant position in chip licensing to deny or downgrade the quality of CPU blueprints it licenses to others in order to disadvantage rivals. The regulator asked Arm to cooperate and preserve related documents.
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The Hot Take: We shall see. ARM busting in on this market too for servers at least. Nvidia is doing both Desktops and Servers with the world just waiting for its desktop SoC.
NVIDIA claims that the demand for Vera is so bonkers that it could become the worldâs top GPU and CPU supplier this year.
Nvidia recently said its Vera CPUs were in full production, with the first CPU racks hand-delivered to OpenAI, SpaceX, Anthropic and Oracle.
For those who came in late, Vera is a key part of the Extreme Co-Design ecosystem powering Rubin, but it drags Nvidia into the standalone CPU market for the first time.
The Arm-based chip uses 88 custom Olympus cores and is built for agentic AI and inference workloads. Nvidia says Vera offers 50 per cent better performance, twice the performance per watt and four times the rack density of traditional x86 CPUs.
It handles orchestration, tool calling, reinforcement-learning workloads, data analytics, agent sandboxing, and long-context state management. The chip is aimed at AI labs, cloud providers and enterprises running agentic AI at scale.
Its core specs include 88 custom Olympus cores, 1.2TB/s memory bandwidth and 50 per cent faster per-core performance under full load. Nvidia claims Vera opens a new $200 billion total addressable market.
The company expects nearly $20 billion in CPU revenue this year, mostly driven by Vera. That would put Nvidia on course to become the worldâs leading CPU supplier, surpassing AMD and Intel, both of which are seeing strong CPU demand from agentic AI workloads.
Nvidia said Vera was co-designed with Rubin GPUs and NVLink to deliver up to 1.5 times faster per-core performance. It claims Vera delivers twice the performance per watt and four times the density per rack compared with x86-based alternatives.
Nvidia chief financial officer Colette Kress said: âVera CPU opens a brand new $200 billion town for NVIDIA, a market we have never addressed before, and every major hyperscale and system maker is partnering with us to get it deployed. We have visibility to nearly $20 billion in total CPU revenue this year, setting us up to become the world-leading CPU supplier.â
The more interesting bit is that the $20 billion number is not for every Vera CPU use case. It applies only to the standalone CPU. Vera will be used as the host CPU for Rubin racks, with two Vera chips connected to four GPUs. Nvidia has entry-level NVL4 racks that use Intel Xeon CPUs.
The company says it will ship millions of Rubin GPUs, which are now in full production, with first shipments planned for the third quarter of 2026. Then there is Vera with CX9 for storage and Vera with CX9 for security.
The standalone CPU is the piece counted in the $20 billion figure, which puts it ahead of AMD EPYC and Chipzilla Xeon CPU figures for this year.
There are some awkward constraints in Veraâs way. Nvidia chief executive Jensen Huang said Vera Rubin will be supply-constrained throughout its life.
The other big choke point is memory, because Vera leans heavily on LPDDR5X, which is already being gobbled up by the AI supercycle. Nvidia is investing heavily to ease those constraints, but demand keeps swelling and both Vera and Vera Rubin need plenty of memory.
âThe 20 billion is for a standalone CPU. And remember, we have Vera, which is used in three ways as a standalone CPU, and four ways. Let me just start with the one that you already know. The first way is Vera Rubin. And weâll sell millions of Rubins, and every two of them is connected to a Vera. And of course, we price those too. And theyâre properly priced. And so thatâs number one use case.â Huang said.
The second use case is Vera standalone CPU. The third is Vera with CX9 and the storage software stack. And then Vera, with CX9, a software stack for security, compute isolation, and confidential computing. And so each one of those use cases is built on Vera. And my sense is that weâll be supply-constrained throughout Vera Rubinâs entire life.
And Vera was designed to be an agentic CPU. The CPUs of the past were designed to have many cores so that it could be easily rentable. People rented cores. Well, agents donât rent cores. They just want the work to be done fast. The economics of the past was dollars per core,â Huang said.
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The Hot Take: NICE, Intel you can send me samples too! :D
Intelâs next desktop CPU family is apparently hitting shipping lanes, albeit as early engineering samples. Nova Lake is expected to be a much bolder reset than merely a routine refresh and could become Intelâs most aggressive swing at the high-end PC market in years, with performance claims that sound almost exaggerated until you remember
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